1. Field of the Disclosure
The present invention relates to a liquid crystal display device and a method for driving the same, more particularly, to a liquid crystal display device driven according to a group control of dynamic polarity control (DPC), which can use an inversion control optimized for each of patterns and more specified by grouping channels, and a method for driving the same.
2. Discussion of the Related Art
According to a conventional liquid crystal display device, a liquid crystal layer having dielectric anisotropy is formed between an upper substrate and a lower substrate. After that, an electric field density formed on the liquid crystal layer is adjusted and molecular arrangement of the liquid crystal material is converted. Because of that, the quantity of lights transmitted via the upper substrate which is a display surface is adjusted and a desired image is presented.
Such a crystal display device includes a liquid crystal panel configured of a plurality of pixels to display an image, a driving circuit for driving the liquid panel and a backlight for projecting a light toward the liquid crystal panel.
An equivalent circuit of each of the pixels composing the liquid crystal panel includes gate lines and data lines crossed with each other, thin film transistors and pixel electrodes arranged at intersections between the gate and data lines, respectively, and liquid capacitors and storage capacitors aligned based on a pixel unit.
The equivalent circuit for each pixel having the above configuration will be driven as follows.
First of all, a scan signal is applied to the thin film transistor and the thin film transistor is turned on. If then, a data voltage corresponding to image data of the pixels is selected to be applied to each pixel via each of the data lines, respectively. The image data is a digital signal capable of presenting a gray level and it is set to have a predetermined level of 0˜225.
After that, an electric field generated by a difference between the data voltage applied to each pixel and a common voltage may be supplied to the liquid crystal capacitor. The light is transmitted based on a predetermined transmittance corresponding to the density of the electric field. At this time, the storage capacitor maintains the data voltage applied to the corresponding pixel for a single frame.
When the electric field having the same polarity is applied to the liquid crystal capacitor continuously, the liquid crystal forming the liquid crystal capacitor might be degraded and a flicker might be generated.
To prevent the flicker and to improve an image quality, inversion control driving which inverts the polarity of the data voltage based on a predetermined unit may be used. The inversion control driving may be categorized, based on a unit of polarity inversion, into frame inversion, line inversion, column inversion and dot inversion control driving.
However, even if displaying images based on the dot inversion driving control in case of displaying a vertical line pattern against a gray background or a horizontal line pattern with a large contrast, a specific pattern image, for example, common voltage distortion might be generated and an error of the image quality such as smear might be generated on a display screen. Because of that, in recent there have been studied devices and control methods which can detects predetermined error patterns where the smear is generated, when image data is input, and which implements the inversion control driving when a smear generation pattern is detected. A rising one of the methods for detecting the smear generation pattern according to a prior art is that error pattern information is set to detect a smear generation pattern, to compare image data with the preset error pattern information.
However, according to the conventional detecting method of error pattern, for example, smear generation pattern, the inversion control is converted frequently if brightness of an image and a pattern of the image are changed a lot. Because of that, image display errors might occur. In other words, pattern recognition of/off of images might be inverted frequently according to a ratio of preset patterns, for example, movement of a folder window or a menu bar and movement of a mouse near a threshold, to generate a display error of flicker referring to a phenomenon that a screen is flickering. However, each of the inversion controls would generate severe noise when a specific frame pattern is displayed on the liquid crystal panel. For example, in case of the dot inversion control which drives neighboring pixels along horizontal and vertical directions to have different polarities, a severe flicker might be generated when a dot inversion pattern is displayed on the liquid crystal panel.
Because of that, in recent have been proposed charge share control which can drive a data driver optimized to a pattern by recognizing a worst pattern and dynamic polarity control (DPC) which can improve image quality deterioration, with lowering a temperature by variation of horizontal inversion.
A conventional DCP driving liquid crystal display device will be described as follows.
FIG. 1 is a diagram illustrating a configuration of a driving circuit provided in a conventional liquid crystal display device and FIG. 2 is a diagram illustrating a timing controller shown in FIG. 1.
As shown in FIG. 1, the conventional DPC driving liquid crystal display device includes a liquid crystal panel 2 having a plurality of gate lines (GL1 to GLn) and a plurality of data lines (DL1 to DLm) and a plurality of pixel areas, a data driver 4 for driving the data lines; a gate driver 6 for driving the gate lines; a timing controller 8 for controlling the gate and data drivers 6 and 4 by generating a gate control signal (GCS) and a data control signal (DCS), based on external synchronization signals (DCLK, DE, Hsync and Vsync), and by supplying the generated gate control signal (GCS) and data control signal (DCS) to the gate driver 6 and the data driver 4, respectively, and for converting an inversion control of the liquid crystal panel 2, when an error pattern is detected based on result of error pattern recognition and result of external input image data (RGB) analysis.
Here, as shown in FIG. 2, the timing controller 8 includes an image processing unit 11 for arranging external image data (RGB) to be proper to a driving of the liquid crystal panel 2 and outputting the arranged image data (RGB) to the data driver 4; a low voltage differential signaling (LVDS) output unit 12 for outputting source start pulse (SSP), source shift clock (SSC), source output enable signals and polarity control signals (POL) to the data driver 4, based on the image signals processed in the image processing unit 11 and the external synchronization signals; a pattern recognizing unit 13 for outputting a horizontal 2-dot inversion polarity control signal by analyzing input image data (RGB) in a state of recognizing a worst pattern and by detecting that the input image data is an error pattern based on the result of the analysis; and a H-dot converting unit 14 for outputting a horizontal 2-dot signal (H2 Dot signal) to drive the data driver 4 according to horizontal 2 Dot inversion control, based on the horizontal 2-dot inversion polarity control signal of the pattern recognizing unit 13.
Here, the pattern recognizing unit 13 analyzes image data for a single line or image data for a single frame, to recognize the error pattern.
A driving method for the conventional DPC driving control liquid crystal display device having the above configuration will be described as follows.
That is, the timing controller 8 arranges the external input image data to be proper to the driving of the liquid crystal panel 2. The timing controller 8 generates the gate control signal (GCS) including gate start pulse (GSP), gate shift clock (GCS) and gate output enable (GOE) signals based on the external synchronization signals (DCLK, DE, Hsync and Vsync), to supply the generated gate control signal to the gate driver 6. The timing controller 8 supplies source start pulse (SSP), source shift clock (SSC) and source output enable (SOE) signals, and polarity control signals (POL) and the arranged image data to the data driver 4, based on the external synchronization signals (DCLK, DE, Hsync and Vsync).
The gate driver 6 sequentially generates scan pulses in response to the gate control signal (GCS) transmitted from the timing controller 8, and it supplies the scan pulses to the gate lines (GL1 to GLn) of the liquid crystal panel 2 sequentially.
The data driver 4 converts the arranged image data (Data) from the timing controller 8 into analog voltages by using the data control signal (DCS) from the timing controller 8 and it supplies the analog voltages to the data lines (DL1 to DLm), respectively. That is, after latching the image data (Data) arranged by the timing controller 8 according to the SSC, the data driver 4 supplies the data lines (DL1 to DLm) image signals for a single horizontal line per single horizontal frame where the scan pulses are supplied to the gate lines (GL1 to GLn) in response to the SOE signal. At this time, the data driver 4 selects a positive or negative gamma voltage having a predetermined level corresponding to a gray scale value of the image data (Data) arranged to correspond to the POL signal. The data driver 4 supplies the selected gamma voltage to the data lines (DL1 to DLm) as image signals.
In the meanwhile, the timing controller 8 recognizes the error pattern by using the pattern recognizing unit 13 and the H-dot converting unit 14, and it analyzes the external input image data (RGB). When the error pattern is detected based on the result of the analysis, the timing controller 8 outputs a horizontal-2-dot signal (H2 Dot signal) capable of converting the inversion driving control of the liquid crystal panel 2.
The data driver 4 drives the liquid crystal panel 2 according to a horizontal-1-dot inversion control at normal image data not detected as error pattern. When receiving the horizontal-2-dot signal (H2 Dot signal) from the image data (RGB) recognized as error pattern, the data driver 4 drives the liquid crystal panel 2 according to the horizontal-2-dot inversion control.
However, the conventional DPC driving liquid crystal display device may have following disadvantages.
First of all, the image data input to recognize the error pattern is analyzed for a single line or frame. Because of that, a predetermined area not proper to an overall driving control might exist. Together with that, image quality deterioration might be generated at a minute area.
Furthermore, the driving mode is controlled by the horizontal-2-dot signal (H2 Dot signal) of the timing controller. Because of that, the number of channels or the driving order cannot be controlled. In the single frame, a polarity period, horizontal-2 dot cannot be varied.